Shigetaka Kasuga
Overview
Explore the profile of Shigetaka Kasuga including associated specialties, affiliations and a list of published articles.
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Articles
2
Citations
2
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Recent Articles
1.
Robust Pixel Design Methodologies for a Vertical Avalanche Photodiode (VAPD)-Based CMOS Image Sensor
Inoue A, Torazawa N, Yamada S, Sugiura Y, Ishii M, Sakata Y, et al.
Sensors (Basel)
. 2024 Aug;
24(16).
PMID: 39205107
We present robust pixel design methodologies for a vertical avalanche photodiode-based CMOS image sensor, taking account of three critical practical factors: (i) "guard-ring-free" pixel isolation layout, (ii) device characteristics "insensitive"...
2.
Hirose Y, Koyama S, Ishii M, Saitou S, Takemoto M, Nose Y, et al.
Sensors (Basel)
. 2018 Oct;
18(11).
PMID: 30373223
We have developed a direct time-of-flight (TOF) 250 m ranging Complementary Metal Oxide Semiconductor (CMOS) image sensor (CIS) based on a 688 × 384 pixels array of vertical avalanche photodiodes...